Summary
This award supports research on three-dimensional (3D) chip design methods that advance national prosperity by enabling more capable and energy-efficient computing systems. Modern software applications, such as Artificial Intelligence (AI) large-language models, require orders-of-magnitude improvements in performance and energy efficiency beyond what traditional transistor scaling can deliver, and a growing share of energy is wasted shuttling data between processors and memory rather than performing useful computation. 3D chip integration can overcome this challenge by co-locating computation
